36 lines
804 B
Text
36 lines
804 B
Text
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# If there is a Delay-block whose input signal differs from its state, we cannot yet advance time:
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delay:RAM_Delay
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delay_in:RAM_InPort
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delay_has_input:RAM_hasInPort (delay -> delay_in)
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some_outport:RAM_OutPort
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delay_in_conn:RAM_link (some_outport -> delay_in)
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in_signal:RAM_Signal
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port_has_signal:RAM_hasSignal (some_outport -> in_signal)
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state:RAM_State {
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RAM_x = `get_slot_value(matched('in_signal'), 'x') != get_value(this)`;
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}
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delay_to_state:RAM_delay2State (delay -> state)
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# Also, we cannot advance time until all outports have signals:
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:GlobalCondition {
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condition = ```
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missing_signals = False
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for _, outport in get_all_instances("OutPort"):
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if len(get_outgoing(outport, 'hasSignal')) == 0:
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missing_signals = True
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break
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missing_signals
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```;
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}
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