Tweak matcher (compute connected components in advance). Simple pattern matching with RAMification (incl. Python expressions) seems to work.

This commit is contained in:
Joeri Exelmans 2024-09-06 21:10:23 +02:00
parent bed3529676
commit 4160a8953e
13 changed files with 388 additions and 70 deletions

View file

@ -105,6 +105,9 @@ class PyState(State):
else:
return None, None
def is_edge(self, elem: Element) -> bool:
return elem in self.edges
def read_dict(self, elem: Element, value: Any) -> Optional[Element]:
e = self.read_dict_edge(elem, value)
if e == None: