4 commits

Author	SHA1	Message	Date
Anand Balakrishnan	4431b79bcd	feat!(core): Change Signal to be a sumtype ... We want to be able to reason about if a signal is empty, constant, or sampled at compile time without using any trait objects. Moreover, the core Argus library shouldn't care about how it deals with interfacing with other languages like Python. Thus, we remove the need for having an `AnySignal` type and what not.	2023-04-14 10:53:38 -07:00
Anand Balakrishnan	6340a18149	feat(core): add NumExpr and BoolExpr to prelude	2023-04-05 13:29:10 -07:00
Anand Balakrishnan	00b03a509f	style: run rustfmt on all files	2023-03-25 20:43:08 -07:00
Anand Balakrishnan	f86f0a2ea8	feat: use argus_core::prelude for necessities	2023-03-24 13:25:04 -07:00